Hi all!
I have a board with the above chipset. While off investigating another issue, I decided to fool with the RAM a bit.
The machine has 2 sticks of PC-133 installed...DIMM 3 is 256MB with 16 chips (2 Rank, 4 Bank, 128Mb Technology) while the other (DIMM 2) is 512MB. It has aluminum covers, so I cannot tell how many chips are installed. SPD identifies it as having 1 Rank, 4 Bank. DIMM 1 is not populated (the socket is actually broken), and to comply with PC-133 specifications, the chipset DRAM Bank 6/7 is disabled.
The board boots fine as stated above, but if I try to run only on DIMM 2 (512MB) in any slot, the machine *beeps* back at me as "No Memory Installed". If I swap slots (both DIMMS installed)...same thing.
This chipset is *supposed* to be compatible with 256MB Technology...and it is...sorta.
Any idea what might be going on here?
Apollo Pro133A (694X) and 512MB DIMM Compatibility
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- The New Guy
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CPU - DFI 586IPVG, K6-2/+ 450 (Cyrix MII 433), i430VX, 128MB EDO.
BIOS patched by BiosMan (Jan Steunebrink).
BIOS patched by BiosMan (Jan Steunebrink).
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- The New Guy
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- Joined: Fri Mar 29, 2002 10:32 pm
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Duh...please re-read the the question asked.
(Note - BIOS is current.)
What I actually want to know is how the Chipset Registers (memory only) should look with the various mbit technologies installed.
(Note - BIOS is current.)
What I actually want to know is how the Chipset Registers (memory only) should look with the various mbit technologies installed.
CPU - DFI 586IPVG, K6-2/+ 450 (Cyrix MII 433), i430VX, 128MB EDO.
BIOS patched by BiosMan (Jan Steunebrink).
BIOS patched by BiosMan (Jan Steunebrink).
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- Use my patch at your own risk!!
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By MemSizing-procedure, which initialize memory-controller. Look this code in the end of bios-file, before BB, for 2Mbit usualy at 36000h in Award bios.What I actually want to know is how the Chipset Registers (memory only) should look with the various mbit technologies installed.
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- The New Guy
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I guess I mean how the registers should look when viewed with a utility such as WPCREDIT.
CPU - DFI 586IPVG, K6-2/+ 450 (Cyrix MII 433), i430VX, 128MB EDO.
BIOS patched by BiosMan (Jan Steunebrink).
BIOS patched by BiosMan (Jan Steunebrink).
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- Use my patch at your own risk!!
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Mbit-tech read from SPD for each DIMM-module.I guess I mean how the registers should look when viewed with a utility such as WPCREDIT.
Last edited by apple_rom on Mon Nov 07, 2005 6:31 pm, edited 1 time in total.
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- The New Guy
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apple_rom - Thanks for posting, but you are not understanding what I am asking here.
Perhaps this post will help everyone understand a bit better -> http://www.lavalys.com/forum/index.php?&showtopic=794
Perhaps this post will help everyone understand a bit better -> http://www.lavalys.com/forum/index.php?&showtopic=794
CPU - DFI 586IPVG, K6-2/+ 450 (Cyrix MII 433), i430VX, 128MB EDO.
BIOS patched by BiosMan (Jan Steunebrink).
BIOS patched by BiosMan (Jan Steunebrink).
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- Use my patch at your own risk!!
- Posts: 125
- Joined: Tue Jan 07, 2003 11:39 am
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Rx58 = 0E, Rx59 = 80--------[ Debug - PCI ]-----
B00 D00 F00: VIA VT82C694X Apollo Pro133A Chipset - Host-PCI Bridge
Offset 00: 06 11 91 06 06 00 10 A2 C4 00 00 06 00 00 00 00
Offset 10: 08 00 00 E4 00 00 00 00 00 00 00 00 00 00 00 00
Offset 20: 00 00 00 00 00 00 00 00 00 00 00 00 43 10 18 80
Offset 30: 00 00 00 00 A0 00 00 00 00 00 00 00 00 00 00 00
Offset 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
Offset 50: FD D8 C8 B6 04 00 30 30 0E 80 00 00 20 20 28 30
Offset 60: 3C 2A 00 A0 E4 E6 E6 00 43 3C 86 2D 08 3F 00 55
Offset 70: C4 88 4C 0C 0E A1 D2 00 00 F4 01 02 00 00 00 00
Offset 80: 0F 45 00 00 C0 00 00 00 02 00 01 00 9E 00 00 00
Offset 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
Offset A0: 02 C0 20 00 03 02 00 1F 02 01 00 00 EB 02 00 00
Offset B0: 62 EC 10 00 00 00 00 00 00 00 00 00 00 00 00 00
Offset C0: 01 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00
Offset D0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
Offset E0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
Offset F0: 00 00 00 00 00 00 00 0E 22 00 00 00 00 00 00 00
Bank 0/1 = 0 = no memory
Bank 2/3 = E = 256Mbitx8 SDRAM
Bank 4/5 = 8 = 128Mbit SDRAM
Bank 6/7 = 0 = no memory
Rx5A = 00, Rx5B = 00
Bank 0/1 = 0 = no memory
Rx5C = 20, Rx5D = 20
Bank 2 = 512Mb
Bank 3 = no memory
(DIMM 512Mb - Single Side)
Rx5E = 28, Rx5F = 30
Bank 4 = 128Mb
Bank 5 = 128Mb
(DIMM 256Mb - Double Side)
Rx56 = 30, Rx57 = 30
Bank 6/7 = no memory
Rx60 = 3C
Bank 0/1 = 0 = no memory
Bank 2/3 = C = SDRAM
Bank 4/5 = 3 = SDRAM
Bank 6/7 = 0 = no memory
Rx64-67 = E4 E6 E6 00
Bank 0/1 = No Interleave
Bank 2/3 = 4-way
Bank 4/5 = 4-way
Bank 6/7 = no slot (may be only 3 DIMM-slots on mobo?)
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- The New Guy
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Bits 7-5: DRAM MA Map Type: 000=16Mb (default), 100=64Mb, 101/11x=Reserved
Bit 4: DRAM Bank VCM Enable: 0=disable (default), 1=enable
Bits 3-1: DRAM MA Map Type: 000=16Mb (default), 100=64Mb, 101/11x=Reserved
Bit 0: DRAM Bank VCM Enable: 0=disable (default), 1=enable
So...
0000 = 0 = 16Mb Technology (default), VCM Disabled
1000 = 8 = 64Mb Technology, VCM Disabled
1010 = A = Reserved, VCM Disabled (*might be* 128Mb Technology?)
11x0 = C/E = Reserved, VCM Disabled (*might be* 256Mb Technology?)
"The problem is that DIMM 3 (4/5) is 128 Mb Technology, and DIMM 2 (2/3) is (possibly) 256 Mb Technology. DIMM 3 has 16 chips (VG36128801BT-7L, 4Mx8x4), while DIMM 2's configuration is unknown at present (covered module)." DIMM 1 (0/1) is available, but broken, so no module can be installed. DIMM 4 (6/7) is not installed on the motherboard.
Device 0 Offset 5F-5A – DRAM Row Ending Address:
Offset 5A – Bank 0 Ending (HA[31:24]) (01h) .......... RW
Offset 5B – Bank 1 Ending (HA[31:24]) (01h) .......... RW
Offset 5C – Bank 2 Ending (HA[31:24]) (01h) .......... RW
Offset 5D – Bank 3 Ending (HA[31:24]) (01h) .......... RW
Offset 5E – Bank 4 Ending (HA[31:24]) (01h) .......... RW
Offset 5F – Bank 5 Ending (HA[31:24]) (01h) .......... RW
Offset 56 – Bank 6 Ending (HA[31:24]) (01h) .......... RW
Offset 57 – Bank 7 Ending (HA[31:24]) (01h) .......... RW
Offset 5A – Bank 0 - 00h - 0000 0000 - No Memory Installed
Offset 5B – Bank 1 - 00h - 0000 0000 - No Memory Installed
Offset 5C – Bank 2 - 20h - 0010 0000 - Row Ending Address = (?)
Offset 5D – Bank 3 - 20h - 0010 0000 - (No module Row, so address does not increment?)
Offset 5E – Bank 4 - 28h - 0010 1000 - Row Ending Address = (?)
Offset 5F – Bank 5 - 30h - 0011 0000 - Row Ending Address = (?)
Offset 56 – Bank 6 - 30h - 0011 0000 - Slot Not Installed (Memory cannot increment)
Offset 57 – Bank 7 - 30h - 0011 0000 - Slot Not Installed (Memory cannot increment)
Bit 4: DRAM Bank VCM Enable: 0=disable (default), 1=enable
Bits 3-1: DRAM MA Map Type: 000=16Mb (default), 100=64Mb, 101/11x=Reserved
Bit 0: DRAM Bank VCM Enable: 0=disable (default), 1=enable
So...
0000 = 0 = 16Mb Technology (default), VCM Disabled
1000 = 8 = 64Mb Technology, VCM Disabled
1010 = A = Reserved, VCM Disabled (*might be* 128Mb Technology?)
11x0 = C/E = Reserved, VCM Disabled (*might be* 256Mb Technology?)
"The problem is that DIMM 3 (4/5) is 128 Mb Technology, and DIMM 2 (2/3) is (possibly) 256 Mb Technology. DIMM 3 has 16 chips (VG36128801BT-7L, 4Mx8x4), while DIMM 2's configuration is unknown at present (covered module)." DIMM 1 (0/1) is available, but broken, so no module can be installed. DIMM 4 (6/7) is not installed on the motherboard.
Device 0 Offset 5F-5A – DRAM Row Ending Address:
Offset 5A – Bank 0 Ending (HA[31:24]) (01h) .......... RW
Offset 5B – Bank 1 Ending (HA[31:24]) (01h) .......... RW
Offset 5C – Bank 2 Ending (HA[31:24]) (01h) .......... RW
Offset 5D – Bank 3 Ending (HA[31:24]) (01h) .......... RW
Offset 5E – Bank 4 Ending (HA[31:24]) (01h) .......... RW
Offset 5F – Bank 5 Ending (HA[31:24]) (01h) .......... RW
Offset 56 – Bank 6 Ending (HA[31:24]) (01h) .......... RW
Offset 57 – Bank 7 Ending (HA[31:24]) (01h) .......... RW
Offset 5A – Bank 0 - 00h - 0000 0000 - No Memory Installed
Offset 5B – Bank 1 - 00h - 0000 0000 - No Memory Installed
Offset 5C – Bank 2 - 20h - 0010 0000 - Row Ending Address = (?)
Offset 5D – Bank 3 - 20h - 0010 0000 - (No module Row, so address does not increment?)
Offset 5E – Bank 4 - 28h - 0010 1000 - Row Ending Address = (?)
Offset 5F – Bank 5 - 30h - 0011 0000 - Row Ending Address = (?)
Offset 56 – Bank 6 - 30h - 0011 0000 - Slot Not Installed (Memory cannot increment)
Offset 57 – Bank 7 - 30h - 0011 0000 - Slot Not Installed (Memory cannot increment)
CPU - DFI 586IPVG, K6-2/+ 450 (Cyrix MII 433), i430VX, 128MB EDO.
BIOS patched by BiosMan (Jan Steunebrink).
BIOS patched by BiosMan (Jan Steunebrink).
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- Use my patch at your own risk!!
- Posts: 125
- Joined: Tue Jan 07, 2003 11:39 am
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Code: Select all
Device 0 Offset 59-58 - DRAM MA Map Type
...
7-5 Bank 1/0 MA Map Type
000 16Mbit SDRAM.....................................default
001 -reserved-
01x -reserved-
100 64Mbit / 128Mbit SDRAM
101 256Mbit x 32 SDRAM
110 256Mbit x 16 SDRAM
111 256Mbit x 8 or x 4 SDRAM
...
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- The New Guy
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Where do you get your info?
I get mine straight from the 694X datasheet (v1.44, May 23, 2005), which was sent to me directly from VIA Support.
If you have a more recent datasheet, please post a link for it. Thanks.
I get mine straight from the 694X datasheet (v1.44, May 23, 2005), which was sent to me directly from VIA Support.
If you have a more recent datasheet, please post a link for it. Thanks.
CPU - DFI 586IPVG, K6-2/+ 450 (Cyrix MII 433), i430VX, 128MB EDO.
BIOS patched by BiosMan (Jan Steunebrink).
BIOS patched by BiosMan (Jan Steunebrink).
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- The New Guy
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- Joined: Fri Mar 29, 2002 10:32 pm
- Location: Pennsylvania, USA
OK...so how can we prove that the same "readings" will apply to the 694X?
And on top of that, why is the thing accepting a 256Mbx8 module when it does not support it...as shown when trying to boot with just that module installed? (See the EVEREST post for more info.)
And on top of that, why is the thing accepting a 256Mbx8 module when it does not support it...as shown when trying to boot with just that module installed? (See the EVEREST post for more info.)
CPU - DFI 586IPVG, K6-2/+ 450 (Cyrix MII 433), i430VX, 128MB EDO.
BIOS patched by BiosMan (Jan Steunebrink).
BIOS patched by BiosMan (Jan Steunebrink).
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- The New Guy
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- Joined: Fri Mar 29, 2002 10:32 pm
- Location: Pennsylvania, USA
OK...let's *assume* that what apple_rom says is true for this chipset.
Why does the machine seem to recognize the 512MB module in conjunction with others, but not on its own?
Why does the machine seem to recognize the 512MB module in conjunction with others, but not on its own?
CPU - DFI 586IPVG, K6-2/+ 450 (Cyrix MII 433), i430VX, 128MB EDO.
BIOS patched by BiosMan (Jan Steunebrink).
BIOS patched by BiosMan (Jan Steunebrink).