Page 1 of 1
NMC-5VMX: More than 384MB possible?
Posted: Thu Sep 15, 2005 3:35 pm
by mofa84
I have a NMC 5MVX with the MVP3-Chipset.
According to the manual the maximum amount of RAM ist 384MB, and my 2x256 are also only detected as 2x128.
But afaik the MVP3 supports 768MB. So s it possible to use the whole 256MB of each module?
Posted: Thu Sep 15, 2005 5:20 pm
by Denniss
It seems you need i440BX compatible memory sticks, doublesided with 16 memory chips (8 per seide) and 8x 16 internal organisation.
Maybe a bios update helps to resolve some memory bugs ?
Posted: Thu Sep 15, 2005 11:50 pm
by mofa84
I have flashed the latest 1MBit-BIOS because I don't know if I can flash the 2MBit-Version?!
http://www.enmic.com/default.php?pg=dow ... 8775cc30e0
Posted: Fri Sep 16, 2005 3:01 am
by Denniss
No - you can't flash the 2MBit version unless you change your 1MBit Flashrom to a 2MBit one.
Is your SDRAM i440BX compatible or are they 8-chip 256MB sticks ?
Posted: Fri Sep 16, 2005 11:42 am
by mofa84
they both have 8 chips on each side.
Posted: Fri Sep 16, 2005 4:32 pm
by Denniss
Manufacturer, memory chips used ?
It is possible this sticks are internal single sided despite having chips on both sides.
Post an infos from stickers you'll see on your sticks !
Posted: Fri Oct 14, 2005 3:36 pm
by mofa84
the label:
256MB PC133
Mustang
M0032643304N
chips:
Infineon
HYB39S128800CT-7
C2
Posted: Sun Oct 23, 2005 4:16 pm
by stephan_g
These Infineon chips should be the right ones for BX-compatible 256 meggers. Probably it's a BIOS issue. That board should be a relabeled Epox, maybe there's a newer one available there.
Posted: Sun Oct 23, 2005 5:48 pm
by mofa84
well, now it works by using slot 1 and 3, although the bios says that only 256mb can be cached.
Posted: Sun Oct 23, 2005 7:30 pm
by Denniss
Do you have the option to change L2-Cache policy from Write-Back to Write-Through ?
Edit : Sustained 3T-Write to disabled (Chipset Features Setup) should do the trick
L2-Cache will be slower but Cacheable Area should be doubled
Posted: Thu Nov 03, 2005 10:07 am
by apple_rom
1. Find 2Mbit flashrom and use last 2mbit bios.
2. Get "Mem_Size" procedure from 2Mbit- bios to 1Mbit bios:
- Copy block at 36000-36FFF from 2Mbit to 1B000-1BFFF of 1Mbit.
- change enter point to this - 9860 in the end block change to 98B0.
- recalculate both checksums - "Mem_Size" and "bios_files".
Or simply disable they checking by "nop-ing" at:
1E954 = 90 90 90 90 90 (five nops - compare bios CRC)
1E979 = 90 90 (two nops - compare Mem_Size CRC)
