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VIA 8233 Southbridge registers: Looking for IDE address

Posted: Tue Feb 18, 2003 9:33 am
by hal900x
Hello again, fellow tweakers. I am using my handy AMI Bios editor to view/edit the registers of my VIA 8233 Southbridge. The utility allows viewing and editing of both bridges in raw DWORD hex format, so you just get a short list of dwords and that's it. I'm looking to use the BIOS editor to increase my IDE latency to 64 to bring it in line with the rest of my devices. If anyone happens to know the address of the IDE controller(or a good util to obtain it), along with the offset of the Latency control register (0D?), let me know, thx.

Posted: Fri Feb 21, 2003 1:53 am
by apple_rom
>If anyone happens to know the address of the IDE controller
??? What about "standart" 17x/1Fx + 376/3F6?
p.s. (page 74 and 87;))


Posted: Sat Mar 01, 2003 12:06 pm
by hal900x

Didnt check this thread much, frankly my questions have not been spefically BIOS-related when the answer came out, so I've pursued other avenues. Rest assure if I ever join the masses of Phoenix/Award users, who CALL THEMSELVE ENTHUSIASTS BUT YET DARE TO TREAD UNEXPLORED GROUND THEY CALL guys that just burst out. I have no idea what came over me, LOL. For those of you who have lost your sense of humor via true geekery, i.e. loss of social skills due to living in forums like these...ahem...sorry lost it again. The reason for my exuberance is not to be gone into here.

As to your kind answer to my thread, thank you. Before I could even both to find the offset I discovered the IDE controller's offset was indeed 0D, on the south brigde. From there it was an easy task. Otherwise I would have answered my own questions in lengthy fashion, heh heh. I have to admit an absolutely laughable mistake. I'm trained in both digital logic theory and Assembly coding. This is true. Needless to say I'm painfully out of practice, having moved to IT consulting years ago ( I wanted to keep SOME social skills). Nonetheless, the is no excuse for posting this question, when I fact all I had to do was realize that the "11" in my analysis program was, yes go ahead and hit me, in Hex. I hang my head in shame. In other words, the program I had painstaking worked on (not the bios editor, a latency modifier) was working fine the entire time, using offset 0D on the South Bridge all along. The problem: 11 is not equal to 17. the latency tool (which ONLY works on devices at 0d, which is fine becase pretty much all PCI devices are) worked just fine when I altered the parameter to 17 (it likes decimal, I dunno why).

The jeers may begin now.

But if you want a simple, highly effectively tool that will even out the latency of every device on your PCI bus, including your AGP slot, you really need to check out this tool. And encourage the original offer to port the damn thing to XP. It is HIGHLY effective under 9x. Oh, and NO, his name is not George Breese.

Posted: Mon Mar 03, 2003 1:37 pm
by NickS
Which tool ?

Posted: Mon Mar 03, 2003 11:30 pm
by hal900x
It is simply called PCITIMER.EXE, and can be run straight from a DOS box under win9x, or put into autoexec etc. It accepts both command lines and/or a config file which is very simple. the author also has a util for agp latency settings, though that is generally unneccesary since PCITIMER does just fine forcing AGP as well as PCI latency. I highly recommind it to anyone who has had the surprise of owning a VIA-based board, running Sisoft or similar analysis and discovering your latency is all over the map and then wondering why your new Gforce card screams but your ata drive is screaming too, but in pain. My IDE controller was set extremely low, while my Gforce driver forced it to 248! I think MAYBE one of my pci/agp cards actually conformed to the BIOS latency setting, so this was a blessing. THe author is Bill Lane, and a good guy who is just competely overwhelmed with RL. He has a very handy progrom for win9x users, and his util is hosted on It works with any device I've tried that occupies offset 0D, which is to say pretty much everything on the PCI and AGP busses including your IDE controller.

Quick warning: the man was nice enough to explain his overworked situtation. I would say that if anyone contacts him, keep it very short and simply request that he complete the original plan, which is still planned, to turn over the source code to some folks at for portiing to 2k/Xp, which would not be that hard, especially since he's done the prelim VXD work. Or, even better if any competent XP developers are reading, that might be ideal, since Overclockers is a fairly overwhelmed site. IN FACT, it occurs to me that ideally someone would volunteer as to hassleing him about There has got to be tons of good programmers not working at an overclock site (hey, not that there's anything wrong with OC'ing, mind you) He is super nice, just super busy like most of us, and he explained he was frustrated by a hard drive crash although he did finally rebuild the utility, so needless to say it's not a priority for him. The utility just rules though, most straightforward and effecting I have ever seen for getting perfect latency balance across the entire PCI/APG busses.

Take care,