ASM routine for enabling PIII L2 cache
Posted: Thu Apr 26, 2007 1:27 am
I hope I'm asking this question in the right section of the forum.
As the subject line suggests, I'm looking for a routine (Code or pseudo-code) for enabling the L2 cache for PIII cpu's.
As the subject line suggests, I'm looking for a routine (Code or pseudo-code) for enabling the L2 cache for PIII cpu's.
