Simms, DIPs and pinouts. If 72pin simms have 144 connection

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rmay635703
Chip off the ol' block
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I have a laundry list of unanswered questions, here goes nothing.

If 72pin simms have 144 physical connections, what are the ones on the back for?

Ditto on 30pin?

I have found the respective pinouts for both 30pin simms, 72pin simms and the DIPs I have.

Anyway I was thinking of taking an 8mb 72pin simm and wiring it into the respective pins in my sockets based on
http://www.repairfaq.org/REPAIR/F_Pinou ... INOUTS_034

Can I ignore the back side and just wire to the front? Or are 8mb simms treated like 2 banks of 4mb with a 4mb simm on the front and one on the back requiring me to hook up the identical pins together?

Mr Wood one of my teachers thinks that I can simply take a23 and attach it to a10 on the simm for the missing address line. Is this assumption acceptable? (this leads to my next question)

I also noticed that a motorola 68010 should really only be able to address 8mb.
http://www.xs4all.nl/~ganswijk/chipdir/giicm/68010.txt
(notice a1-a23 which is not 24bits)
But I believe that it does something screwy with the a23 address pin allowing it to multiplex for a virtual 24bit address, does this eliminate my ability to just hook it up to the missing address line?

Thanx for the previous links :)
Ryan

(sorry if this seems duplicate, I don't really know what to put this under)
KachiWachi
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I always wondered that if you had a single-sided 16MB SIMM (8 chips on one side for example), if you could put 8 chips on the back side to make it a 32MB SIMM (of course using the same type and speed-rated parts...).

I would think for manufacturing reasons, a manufacturer would use the same PC board, but just not populate it...
NickS
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If 72pin simms have 144 physical connections, what are the ones on the back for?
Ditto on 30pin?
Well, on a SIMM (Single In-line Memory Module) socket you will find that there is only a single, in-line set of connectors, which are sort of horse-shoe shaped. The act of clipping the module into place should force both prongs of the connector into contact, one with each side of the PCB. The 30-pin and 72-pin SIMMs I have in front of me have "vias" i.e. through connections from one side of the PCB to the other. You need only connect to one side - they're both the same.
SO the question really is - why put the same connections on both sides ? Answer - reliability, I guess.
I always wondered that if you had a single-sided 16MB SIMM (8 chips on one side for example), if you could put 8 chips on the back side to make it a 32MB SIMM (of course using the same type and speed-rated parts...).
I suspect it depends. Taking a look at this double-sided 1Mx36 72-pin SIMM in front of me (one side populated) I find that A10 is not connected and therefore, I guess, it cannot be converted into a 2Mx36 module. Unfortunately I don't have my whole collection here to check out what happens on 2Mx32 and 4Mx32.

Without putting serious brain power into it (how many address bits in RAS and how many in CAS for that organisation?), I'm dubious about connecting A23 on the MPU to A10 on the DIMM. I'll try to think about it, but I wouldn't hold your breath.
rmay635703
Chip off the ol' block
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I always wondered that if you had a single-sided 16MB SIMM (8 chips on one side for example), if you could put 8 chips on the back side to make it a 32MB SIMM (of course using the same type and speed-rated parts...).
Yes you can with a but, you have to take the two 4mb modules and wire them into one socket but send the a10 line on the socket to the 1st 4mb simms a9 line then send the a9 line on the socket to the a9 line on the 2nd simm. This makes the two look like a single 8mb simm. This is what those simm trees do.
I also noticed that a motorola 68010 should really only be able to address 8mb.
http://www.xs4all.nl/~ganswijk/chipdir/giicm/68010.txt
(notice a1-a23 which is not 24bits)
Any ideas on if the a23 address line is usable without "special" means? Because as I said before it looks as if something strange happens on that pin.

Cheers
KachiWachi
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I'd really be interested in converting some of my 4x32 modules to 8x32 so I can max out the RAM in some of my machines. Hopefully there are some easy ways to tell if the boards are ready for that, without me doing extensive continuity on them against a working 8x32 module to find out.

All the modules I have are physically single-sided, with pads available on the backside of the board. Most all are same-manufacturer sets of 4, so that does simplify things a bit.

An example RAM chip I have on one set of boards can be found here - TMS417409ADJ-60
rmay635703
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If you have junked out motherboards (non-working) with 72pin simm sockets the easiest way (unfortunately) is to leave the modules alone put them in their own socket and wire the sockets together straight, EXCEPT for the address lines.

As NickS said earlier simply putting them on the back would require a continuity test to see if the module attaches A10 or A11 somewhere.

See this chart, A10, A11, A12 (which is for 32mb I think and not shown but I believe is listed as one of the N/C?)
http://www.pcmech.com/simm72-pinout.htm

You need to make sure (if your just adding chips to the back) that there are enough address pins available for the amount of memory 11 for 8mb 12 for 16mb 13 for 32mb. So you must find out if the extra address line is connected. 32mb would need a12 attached if it is great, now? Where in the world is A12?

Cheers
NickS
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rmay635703 wrote:You need to make sure (if your just adding chips to the back) that there are enough address pins available for the amount of memory 11 for 8mb 12 for 16mb 13 for 32mb. So you must find out if the extra address line is connected. 32mb would need a12 attached if it is great, now? Where in the world is A12?
Not quite: remember, these lines are multiplexed using RAS and CAS, so each DRAM address line is used twice.

To address 64K you only need 8 lines. To address 1M you need 10 lines (A0-A9). On a 72-pin SIMM that's 1Mx32 or 36, 4 MB. For 8MB *or* 16MB you need 11 lines (A0-A10). For 32MB or 64 MB you need 12 lines (A0-A11). You don't need A12.
KachiWachi
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Ditto on the A0->A11 8)

Where do the chip /W and /OE get connected?

The pinout chart also shows PD1->4...what do those do?

Guess I need to do a little research on how each chip/module/bank is selected and addressed...

I already looked at the address lines, and since these are 32MB modules to begin with, A0->A11 are wired to the chips already mounted on the board. I guess then I just have to verify if the address lines go to the backside of the board, and how the /RAS and /CAS are wired, since that will determine if another 32MB can be selected and addressed...correct??
KachiWachi
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PD = Presence Detect. See 72 Pin SIMM Characteristics.

The 16MB modules have Pin 67 grounded per the table (pin 67 to Gnd for 60nS), but the 32MB module I have does not utilize this feature...

MP0->4 are not used, since these are non-parity modules.

All Vcc, Vss, /WE, and /OE are tied together.

As stated previously, all address lines bussed together, A0->A11.

4 Data lines (DQ) go to each chip, and those tie to the chip "space" directly behind them. 8 chips on the 32MB module, so 4x8=32...all lines accounted for. For a 64MB module, something else has to determine which chips supply the data on the Bus.

Each /RAS line is connected to 4 chips/side, every other one.

Each /CAS line is connected to 2 chips/side, every other one.
These are also tied to the chip "space" directly behind them.

So a physically laid out single-sided 32MB module would use 2 /RAS and 4 /CAS to select a specific memory location (byte), and a 64MB module would use 4 /RAS and 4 /CAS to select a specific memory location (byte).

How does the chipset determine this?
rmay635703
Chip off the ol' block
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Ah, yes I forgot about that multiplexing business.

But heres a question if 10 address lines can address 1mb why can I only put in 512kb modules? Is this because the modules are x4 and 1024kbit x 4 = 512kbyte.

Now this multiplexing does bring up something in my favor, the motorolla 68010 multiplexs address line a23 in a similar way that the dram is multiplexed. (motorolla 68000's don't have 24 address lines) Now if only there was not any latency between a memory request and the dram controller. :)

Cheers
NickS
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rmay635703 wrote:But heres a question if 10 address lines can address 1mb why can I only put in 512kb modules? Is this because the modules are x4 and 1024kbit x 4 = 512kbyte.
Yes. If you look carefully I said "1M" not "1MB" or "1Mb". Some years ago it could have been 12-bit words, 18-bit words.... so 1Mx4bits = 512 Kbytes
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rmay635703
Chip off the ol' block
Posts: 67
Joined: Thu Apr 04, 2002 6:25 pm

Hi When I started making the 30pin simm to dipp converter I noticed that there is no chip enable on a simm, which I guess would be handled by the simm itself as A0 is probably tied to chip 1 &2's OE (operation enable) as well as the address pin so you get the appropriate 8bits sent.

So does it matter that I didn't connect the chip enable pins on the socket?

I was told it shouldn't but I'm not so sure.

Cheers
KachiWachi
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On the 72-pin SIMM, the /OE (Output Enable) is grounded.

Ryan - What RAM chips are you using? I'd like to compare data sheets...if you found one. :)
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