1. I got my hands on one of those rare boards using revision H of Aladdin V chipset. This revision has a working internal tag RAM!
However, Gigabyte didn't enable it as I confirmed by looking at chipset registers under Win98SE. Instead, they continued soldering an external tag RAM chip onto their boards and using it:
GA-5AX Offset 40
GA-5AX Offset 41
In contrast, Asus with their P5A (Rev. 1.06!) and Jetway with their 542C used revision G of ALi Aladdin V and they didn't solder additional tag RAMs anymore. Instead, they used the internal one and set chipset registers accordingly:
542C Offset 40
542C Offset 41
I already tried to activate the internal tag RAM of my GA-5AX under Win98SE but it always ended up with a system hang, rebot, or BSoD. I guess enabling is best done during P.O.S.T.
Reading Jan Steunebrink's remarks to the 542C BIOS patch led me assume that he has experiences in editing chipset register settings in the BIOS. I already wrote him an email but I don't know if his email address is still up to date. Therefore, I post my queries here, too.
Is it possible to configure GA-5AX's BIOS that it sets the following registers during chipset initialisation in such a manner as it is done by the Jetway 542C?:
- Offset 40 to Hex 53 (Bin 01010011) -> bit #6 activates internal tag RAM when set to 1
According to the datasheet ALi M1542/M1542 (http://www.hard-net.de/info_wissen/chip ... -M1542.pdf), the BIOS first decides the state of internal tag RAM (index 40h, bit 6) by the HA[23] at powering on then it can be read and written.
- Offset 41 to Hex 05 (Bin 00000101) -> bit #0 deactivates external tag RAM when set to 1
I don't know whether it is possible to use internal and external tag RAM at the same time. I would give it a try and test it. May be it is possible to create an option in SETUP where you can select between internal, external, or both tag RAMs.
- Offset 43 to Hex F7 (Bin 11110111) -> bit #7 enables Force Snoop INV when set to 1; bit #1 enables Fast NAJ when set to 1
GA-5AX Offset 43:
542C Offset 43:
And a second question: the BIOS configures SDRAM RAS Precharge time (tRP) at 4T for all FSB settings faster than 83 MHz. However, 2T also seems to work.
Do you think it is possible to set
- Offset 48 to Hex 1E (Bin 00011110)
for all FSB frequencies during chipset initialisation by the GA-5AX BIOS?
GA-5AX Offset 48@FSB100:
542C Offset 48@FSB100:
Would you be interested in doing these modifications to unleash the full power of the chipset?
I will do testings of the new BIOSes after each step.
Maybe some of the options can be made accessible in the BIOS setup?
If you know any additional improvements you are welcome to implement them. I will do testings.
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