IBM Thinkpad 600E bios mod for processor update
I will test my processor in my friend's Dell.He want to exchange his PIII 500 with my PIII 650.The power of 500MHz is enough for me.I would like to install and mod any SS PIII in the future.But problem is actual untill I exchange my processor.Thank You for advices.
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irishconvict
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Has anybody tried upgrading the cpu on a 390e to a P3? ANybody familiar with clock generator hack on the 390e? Will the mobo do 100 mhz fsb? thanks
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blogGreen88
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Are you talking about notebook hard drives or something else?! Umm. There is a good page for notebook hard drives perhaps!
Also,you can find some other content on it,such as garage kits or czech airlines or countdown timer.
You can search on the homepage try some other keywords,no ads even.these page updated every day.Because of the huge database,it perhaps not very fast,if you don't like it,take it easy.
Also,you can find some other content on it,such as garage kits or czech airlines or countdown timer.
You can search on the homepage try some other keywords,no ads even.these page updated every day.Because of the huge database,it perhaps not very fast,if you don't like it,take it easy.
Hi Sharedoc,
Have not tried to run your code, but a couple of comments (if you have solved the satbility problem, then please ignore this).
You will likely need to execute the "cpuid" instruction before getting
the cycle counts to serialize instruction execution - without this,
some intructions will be executed out of order, which effects the cycle count. The cpuid instruction was introduced in the pentium x86 processor, and in some of the "newer" 486 processors. If your assember does not support cpuid, you can use a macro that does the equivalent of this C fragment to emit the sequence 0fa2h :
#define cpuid __asm __emit 0fh __asm __emit 0a2h
You may also want to disable interrupts before executing
cpuid and reading the cycle count to ensure an interrupt handler
does not sneak in. Level 1 and 2 instruction cache can effect the
execution times, so it is best if you are only executing the code in
your measurement loop (and not some spurious interrupt handler code
- that may be generating cache misses) during the cycle count. Don't forget to enable interrupts. Here is a short papers on using the rdtsc instruction for performance monitoring.
http://www.cs.usfca.edu/~cruse/cs210/rdtscpm1-1.pdf
Have not tried to run your code, but a couple of comments (if you have solved the satbility problem, then please ignore this).
You will likely need to execute the "cpuid" instruction before getting
the cycle counts to serialize instruction execution - without this,
some intructions will be executed out of order, which effects the cycle count. The cpuid instruction was introduced in the pentium x86 processor, and in some of the "newer" 486 processors. If your assember does not support cpuid, you can use a macro that does the equivalent of this C fragment to emit the sequence 0fa2h :
#define cpuid __asm __emit 0fh __asm __emit 0a2h
You may also want to disable interrupts before executing
cpuid and reading the cycle count to ensure an interrupt handler
does not sneak in. Level 1 and 2 instruction cache can effect the
execution times, so it is best if you are only executing the code in
your measurement loop (and not some spurious interrupt handler code
- that may be generating cache misses) during the cycle count. Don't forget to enable interrupts. Here is a short papers on using the rdtsc instruction for performance monitoring.
http://www.cs.usfca.edu/~cruse/cs210/rdtscpm1-1.pdf
Sharedoc wrote:I have been working on a stupid small ASM proggie to compute CPU speed. I am using the same logic as in W Marcus Millers DeepSleep utility.
I can't get the program accurate enough, though.
Has anyone reverse engineered bios code, how Award/AMI bios computes the clock speed at bios boot?
Below the working code
CPUSPEED: ; This program displays the processor speed in Megaherz
; Author: Sharedoc Justlink Date: 11.12.2005 - 7.1.2006
; Oulu, Finland
;
; Phase 1 - Read time from MSDOS real-time clock service
MOV AH,2CH ; INT 21H = Real-Time Clock, 2CH => get time
INT 21H ; DH= seconds, DL = 1/100 of seconds 0...99
PUSH DX ; store Real-Time Clock 1st reading in stack
;
; Phase 2 - Get CPU start cycles count
RDTSC ; Get cycles_count
PUSH EDX ; push initial cycles count to stack
PUSH EAX
; Phase 3 - Big delay loop
MOV EAX,0FFFFFFFH ; We can adjust the delay by initial loop count
DELAYLOOP: NOP ; begin loop
DEC EAX
JNZ DELAYLOOP
; Phase 4 - Get CPU end cycles
RDTSC ; Get cycles_count
POP EBX ; Get initial cycles
SUB EAX, EBX ; subtract low 32-bits
POP EBX
SBB EDX, EBX ; subtract high 32-bits
PUSH EDX ; Push resulting cycles consumed
PUSH EAX
; Phase 5 - read real-time clock 2nd time
MOV AH,2CH ; INT 21H = Real-Time Clock, 2CH => get time
INT 21H ; DH= seconds, DL = 1/100 of seconds 0...99
MOV CX, DX ; store 2nd real-time clock reasing into CX
; ;
POP EAX ; Phase 6 - calculate time used
POP EDX ; EDX:EAX containing cycles consumed
POP BX ; Get 1st real-time clock reading
; subtract 1st timeslots from 2nd to get time difference
SUB CH, BH ; whole seconds gone?
JZ ONLY100S ; if not, then only hundreths of sec passed
ADD CL,100 ; if yes, add 100 to hundreths
DEC CH ; check if over 2 sec
JZ ONLY100S ; nope
ZERO100S: JMP TIMEERROR ; measurement time error
ONLY100S: SUB CL,BL ; we calculate duration in hundreths of seconds
JZ ZERO100S ; if it is zero, then timing error
AND ECX, 0FFH ; otherwise we pack it in to 32-bit unsigned binary
;
; Phase 7 - calculate MHz as cycles/time used
DIV ECX ; EAX contains no of cycles, ECX duration in 10ms units
MOV EDX,EAX ; copy 32-bit result from EAX to EDX
SHR EDX,16 ; DX:AX contains now 32-bit dividend
MOV CX,10000 ; get into megahertz scale
DIV CX ; ->AX contains megaherz countas binary 16-bit unsigned value
;
; Phase 8 - Convert from binary to decimal for display
MOV CL,10 ; divide by 10 to get
DIV CL ; megahertz units as remainder in AH
ADD AH,'0' ; convert to ASCII character
MOV BL, AH ; 1st digit of MHz ASCII string into EBX
AND AX,0FFH ; AL contains megahertz tens
DIV CL ; divide by 10 to get
ADD AH,'0' ; tens, convert to ASCII character
MOV BH, AH ; 2nd digit of MHz ASCII string into EBX
SHL EBX,16 ; move to higher 16 bits of 32 bit doubleword
AND AX,0FFH ; AL contains megahertz hundreds
DIV CL ; let's divide by 10 to get
ADD AH,'0' ; hundreds, convert to ASCII
MOV BH, AH ; 3rd digit of MHz ASCII string into EBX
AND AL,0FH ; Test if 4rd digit of MHZ ASCII string is 0
JZ BLANKO ;
ADD AL,'0' ; reminder is thousands, convert to ASCII
JMP NONBLANKO
BLANKO: MOV AL,' ' ; reminder is 0, convert to ASCII space character
NONBLANKO: MOV BL,AL
PUSH EBX ; push ASCII digits to stack
;
; Phase 9 - Display
MOV DX,SP ; MS-DOS memory-pointer now points to the MHz string
MOV CX,4 ; we will output 4 bytes
MOV BX,1 ; open-file handle for standard output is 1
MOV AH,040 ; function number for MS-DOS write is 040
INT 33 ; write the string to standard output
POP EAX ; pop string off the stack
MOV DX, MHZTEXT ; MS-DOS memory-pointer now points to the MHz string
DISPL: MOV CX, 11 ; Display of fixed strings, we will output 11 bytes
MOV BX,1 ; open-file handle for standard output is 1
MOV AH,040 ; function number for MS-DOS write is 040
INT 33 ; write the string to standard output
MOV AX,04C00 ; MS-DOS function-number for successful exit
INT 33 ; go back to the operating system
TIMEERROR: MOV DX, ERRORTEXT ; MS-DOS memory-pointer now points to error print string
JMP DISPL
MHZTEXT: DB ' MHz(about)'
ERRORTEXT: DB ' TIME ERROR'
wmarcusm
well i just obtained a 600e 2 weeks ago and i was reading through the forums to see how it was possible to upgrade because the 400 mhz p2 was seriously lacking in power if used to playback alot of my avi files.So this is my experience.i purchased a speedstep p3 650 for $25. The target 500 Mhz was more than enough for what i would be using it for.next downloaded the serice manual at lenovo to find out how to open it up.Processor arrived today disabled l2 cache before i started and the whole proccess took about 15 mins from taking apart to putting back together was a breeze one thing i did notice just to let others out there know theheat pipe had some kind of oil between the pipe and the actual plate it contacted i know that the pipe is soldered on but the sides could use some thermal paste that would definitely help out. I wouldnt advise what katch did he pulled off the thermal pad and put an extra thickcoating of artic silver heatsink paste is meant to be spread as thinly as possible if its to thick it insulates the processor.and after everything was put back together winxp install took forever most likely because of the lack of l2 cache.after i got everthing installed including the powerleap app and ghosted so i wouldnt have to wait ever again i found a new driver for the video card it seems to work better than the one included with xp and with the use of vlc my average cpu use while playing back 720x480 avis typically hovers around mid 30s occasionally peaking at about 41%. Thanks for all the people who contributed to these forums because if it weren't for u guys this great computer probably woulda been tossed out 
so my total investment $50 for the 600e almost 100% brand new including full charge battery and 25 for the cpu grand total of $75 making an old piece of shit running faster PRICELESS!!! if u guys need the new video driver just ask!! Thanks for all your hard work Sharedoc!!
so my total investment $50 for the 600e almost 100% brand new including full charge battery and 25 for the cpu grand total of $75 making an old piece of shit running faster PRICELESS!!! if u guys need the new video driver just ask!! Thanks for all your hard work Sharedoc!!Hi,
That's right. I put the code in GRUB. The speedstep mod and the level 2 cache can be enabled before booting an operating system.
Being a Linux user, I have not been satisfied with the existing solutions to enable the speedstep mod. The kernel module by wmarcusm is great but has one problem. Since it does not change the kernel's internal variables like loops_per_jiffies, time-related tasks can malfunction. If you do 'sleep(1)', it actually sleeps less than 1 second. I do a lot of timing-sensitive stuff, so it is a real problem for me.
The tsc is not recalibrated either. To make everything work properly, the kernel source has to be modified. But, if you have no problem giving up tsc, it is possible to add "clock=pit" to the kernel boot options. Then you only need to update loops_per_jiffies or cpu_data.loops_per_jiffies, which can be done in a kernel module.
But I wanted to use tsc as the time base and did not want to patch and recompile the kernel everytime I install a new kernel. So I put them in the boot loader, GRUB.
I am not using Windows, but if you do, it will activate the mod and enable the cache before Windows loads. It will also activate the mod/l2cache when waking up from WinXP hibernation. (If APM hibernation is used, it won't work, as APM hibernation/wakeup is implemented in BIOS and bypasses the bootloader. WinXP uses ACPI by default and implements its own hibernation method.)
Even with this version of GRUB, wmarcusm's programs will be still useful for re-enabling the feautures after waking up from suspend or APM hibernation.
One thing to note is that the port address is hardcoded. Yes, it sounds stupid, but all three ThinPad 600E's that I have access to reports the same base i/o address for the south bridge. So far I had no problem on any of the three. If you do, probe it using wmarcusm's code and put that number in place of the existing hardcoded base address.
To use the feature, you just need to add "tpad" command to your boot configuration file. If you add the "--nods" option, it will only enable the l2 cache and leave the speedstep mod alone.
One final note is that, if you only have NTFS partitions, you cannot use this version of GRUB, as it lacks NTFS support. The stage2 images can be installed on linux or fat partitions. It will be great if it is ported to WINGRUB or GRUB4DOS. If you have no idea what I am talking about, just stay with your current configuration.
The source tar ball is available at:
http://www-rtsl.cs.uiuc.edu/~klee7/grub-0.97tpad.tgz
Enjoy!
- Chantage
That's right. I put the code in GRUB. The speedstep mod and the level 2 cache can be enabled before booting an operating system.
Being a Linux user, I have not been satisfied with the existing solutions to enable the speedstep mod. The kernel module by wmarcusm is great but has one problem. Since it does not change the kernel's internal variables like loops_per_jiffies, time-related tasks can malfunction. If you do 'sleep(1)', it actually sleeps less than 1 second. I do a lot of timing-sensitive stuff, so it is a real problem for me.
The tsc is not recalibrated either. To make everything work properly, the kernel source has to be modified. But, if you have no problem giving up tsc, it is possible to add "clock=pit" to the kernel boot options. Then you only need to update loops_per_jiffies or cpu_data.loops_per_jiffies, which can be done in a kernel module.
But I wanted to use tsc as the time base and did not want to patch and recompile the kernel everytime I install a new kernel. So I put them in the boot loader, GRUB.
I am not using Windows, but if you do, it will activate the mod and enable the cache before Windows loads. It will also activate the mod/l2cache when waking up from WinXP hibernation. (If APM hibernation is used, it won't work, as APM hibernation/wakeup is implemented in BIOS and bypasses the bootloader. WinXP uses ACPI by default and implements its own hibernation method.)
Even with this version of GRUB, wmarcusm's programs will be still useful for re-enabling the feautures after waking up from suspend or APM hibernation.
One thing to note is that the port address is hardcoded.
Yes, it sounds stupid, but all three ThinPad 600E's that I have access to reports the same base i/o address for the south bridge. So far I had no problem on any of the three. If you do, probe it using wmarcusm's code and put that number in place of the existing hardcoded base address.To use the feature, you just need to add "tpad" command to your boot configuration file. If you add the "--nods" option, it will only enable the l2 cache and leave the speedstep mod alone.
One final note is that, if you only have NTFS partitions, you cannot use this version of GRUB, as it lacks NTFS support. The stage2 images can be installed on linux or fat partitions. It will be great if it is ported to WINGRUB or GRUB4DOS. If you have no idea what I am talking about, just stay with your current configuration.
The source tar ball is available at:
http://www-rtsl.cs.uiuc.edu/~klee7/grub-0.97tpad.tgz
Enjoy!
- Chantage
Lazerman,
i think that the 600E have one module solder on the motherboard, and one slot free.
you can install max 256MB on each slot, but the soldered module is often 128MB, so you can get 384MB of memory, if you are practice of soldering you can put 512MB...
Hi to all,
i decided to renew my father's 600E (i always loved that nb!), after some search i found this ng and i think you guys are great!
I can't believe that so many people still use the 600E, it sounds nice to me....
what is the best choice for the CPU to mount in a 600E?
Also considering that i'm not much able with soldering
supersoul
will this http://cgi.ebay.it/850-MHz-MOBILE-PIII- ... dZViewItem
works for my 600E?
i think that the 600E have one module solder on the motherboard, and one slot free.
you can install max 256MB on each slot, but the soldered module is often 128MB, so you can get 384MB of memory, if you are practice of soldering you can put 512MB...
Hi to all,
i decided to renew my father's 600E (i always loved that nb!), after some search i found this ng and i think you guys are great!
I can't believe that so many people still use the 600E, it sounds nice to me....
what is the best choice for the CPU to mount in a 600E?
Also considering that i'm not much able with soldering
supersoul
will this http://cgi.ebay.it/850-MHz-MOBILE-PIII- ... dZViewItem
works for my 600E?
Lazerman,
http://zurich.ai.mit.edu/hypermail/thin ... /1121.html
Known to work
Viking 286172 PC100 256MB James Maugham
Crucial 256 (Type 2662 from X20 matrix) Nat
SimpleTech with Toshiba chips Carl Lowensohn
Kingston KTM-TP390X/256 James Maugham 116
Crucial CT184910 $71.99 is cheap Jan02 James Maugham
Viking I0258 James Maugham
http://zurich.ai.mit.edu/hypermail/thin ... /1121.html
Known to work
Viking 286172 PC100 256MB James Maugham
Crucial 256 (Type 2662 from X20 matrix) Nat
SimpleTech with Toshiba chips Carl Lowensohn
Kingston KTM-TP390X/256 James Maugham 116
Crucial CT184910 $71.99 is cheap Jan02 James Maugham
Viking I0258 James Maugham
-
Calvin & Hobbes
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- Posts: 6
- Joined: Sun Aug 28, 2005 12:23 pm
supersoul
will this http://cgi.ebay.it/850-MHz-MOBILE-PIII- ... dZViewItem
works for my 600E?[/quote]
No...You have to find the mmc-2 type!
will this http://cgi.ebay.it/850-MHz-MOBILE-PIII- ... dZViewItem
works for my 600E?[/quote]
No...You have to find the mmc-2 type!
Well, where can an PIII 850mhz chip be found? I can't find one anywhere. I guess I may just have to settle for 750mhz.... Although can't you speedstep or something to make it faster?
And is there any mods just to put the 750/850 cpu and the bigger memory in (like updates or hardware mods)?
And is there any mods just to put the 750/850 cpu and the bigger memory in (like updates or hardware mods)?
TP600E has two available 144pin SO-DIMM slots. You can put two 256MB modules to make it 512MB + internal 32MB. The internal 32MB most likely won't work at 100MHz if the system board is of an older revision. In this case, you need to disable the soldered memory.supersoul wrote:Lazerman,
i think that the 600E have one module solder on the motherboard, and one slot free.
you can install max 256MB on each slot, but the soldered module is often 128MB, so you can get 384MB of memory, if you are practice of soldering you can put 512MB...
--snip--
Some PC133 memory works in the second bank. I put an IBM PC100 256MB module in the first socket and a PC133 256MB module in the second. The system has been working fine for months and it is the one with an older system board. So, If you come across a PC133 SO-DIMM, don't readily dismiss it before trying it.
-chantage
finally i bought this CPUCalvin & Hobbes wrote: No...You have to find the mmc-2 type!
http://cgi.ebay.it/ws/eBayISAPI.dll?Vie ... IBSA:IT:11
i hope it will work, did it?
I am arrived to the processor card, I thought i find a carving near CPU to translate and unblock CPU's feet, but i didn't find anything...
how can i remove the cpu safetly? in google and in this topic i didn't find anything...
what about the thermal pad?
can it be replaced with thermal grease or i have to replace with another pad?
ss
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Calvin & Hobbes
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- Posts: 6
- Joined: Sun Aug 28, 2005 12:23 pm
Supersoul.
Someone has removed the heat sinks off this module!
I would recomend you to contact the seller.
It is actually the whole module you replace. you have the connector on the other side of the assy. If your module was correct you only have to open the 600, unscrew the fan and module, snap it off the mobo and replace it with the new module, add some Artic silver and back with everything and you´e done.
This is a very small image showing you the complete module.
http://img223.imageshack.us/img223/6853 ... 8009va.jpg
Someone has removed the heat sinks off this module!
I would recomend you to contact the seller.
It is actually the whole module you replace. you have the connector on the other side of the assy. If your module was correct you only have to open the 600, unscrew the fan and module, snap it off the mobo and replace it with the new module, add some Artic silver and back with everything and you´e done.
This is a very small image showing you the complete module.
http://img223.imageshack.us/img223/6853 ... 8009va.jpg
